Voltage conversion circuit and electronic system using the same

An electronic system, comprising:

• a voltage conversion circuit, receiving an input voltage and transforming the input voltage to an output voltage, wherein the input voltage is smaller than the output voltage or the input voltage is larger than the output voltage;
• and
• a load, connected to the voltage conversion circuit, the load receiving the output voltage,
• wherein the voltage conversion circuit comprises:
• an inductor, having one terminal electrically connected to an input voltage;
• a first switch transistor, having a drain connected to another terminal of the inductor, having a gate connected to a switch signal and determining switched-on or switched-off state itself according to the switch signal, having a source connected to a ground voltage;
• a second transistor, having a drain connected to another terminal of the inductor, having a gate connected to the switch signal, wherein switched-on or switched-off state of the second transistor is opposite to those of the first switch transistor;
• a first resistor, having one terminal connected to a source of the second switch transistor, having another terminal connected to a clamping voltage;
• a second resistor, having one terminal connected to another terminal of the first resistor, having another terminal connected to one terminal of an output capacitor and outputting an output voltage, wherein another terminal of the output capacitor is connected to the ground voltage;
• and
• a P type transistor, having a source connected another terminal of the inductor, having a gate receiving a control signal and accordingly determining whether to enter into a saturation region or a linear region, having a drain connected to one terminal of the output capacitor,
• wherein when the input voltage is larger than the output voltage and voltage level of the switch signal is changed from high voltage level to low voltage level, the control signal is the clamping voltage and the P type transistor enters into the saturation region, so that a drain voltage of the first switch transistor is sum of the clamping voltage and a source-gate voltage of the P type transistor,
• wherein when the input voltage is smaller than the output voltage and voltage level of the switch signal is changed from high voltage level to low voltage level, the control signal is the switch signal and the P type transistor enters into a linear region, so that a drain voltage of the first switch transistor is sum of the output voltage and voltage-drop of the P type transistor.