Chip-on-film package and display device including the same
AssigneeSamsung Display Co., Ltd.
InventorHee Kwon Lee
Life of this patent
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Abstract
A chip-on-film package includes a base film including a bending area, an integrated circuit chip at an upper surface of the base film, a first line at the upper surface of the base film and overlapping the bending area, a second line at a lower surface of the base film and overlapping the bending area, a via pattern penetrating the base film to electrically couple the first line and the second line, and a common line coupled to the first line and to the integrated circuit chip, wherein at least a portion of the first line does not overlap at least a portion of the second line in a plan view.
Claims19
A chip-on-film package comprising:
- a base film comprising a bending area;
- an integrated circuit chip at an upper surface of the base film;
- a first line at the upper surface of the base film and overlapping the bending area;
- a second line at a lower surface of the base film and overlapping the bending area;
- a via pattern penetrating the base film to electrically couple the first line and the second line;
- and
- a common line coupled to the first line and to the integrated circuit chip,
- wherein at least a portion of the first line does not overlap at least a portion of the second line in a plan view.
A display device comprising:
- a display panel for displaying an image;
- a printed circuit board for driving the display panel;
- and
- a chip-on-film package for electrically coupling the display panel and the printed circuit board, the chip-on-film package comprising:
- a base film comprising a bending area;
- an integrated circuit chip at an upper surface of the base film;
- a first line at the upper surface of the base film and overlapping the bending area;
- a second line at a lower surface of the base film and overlapping the bending area;
- a via pattern penetrating the base film and electrically coupling the first line and the second line;
- and
- a common line coupled to the first line and to the integrated circuit chip,
- wherein at least a portion of the first line does not overlap at least a portion of the second line in a plan view.
Dependencies are inferred from the claim text.