Method of manufacturing wiring board
AssigneeKyocera Slc Technologies Corporation
InventorsKohichi OHSUMI, Sumiko NOGUCHI
Life of this patent
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Abstract
A manufacturing method includes a step of forming a first plating mask on a base metal layer, a step of forming a main conductor layer on the base metal layer exposed from the first plating mask, a step of forming a second plating mask on them, a step of attaching a metal plating layer to an upper surface of the main conductor layer exposed from the second plating mask, a step of removing the first and second plating masks, a step of etching away a portion of the base metal layer to which the main conductor layer is not attached, and a step of forming a solder resist layer.
Claims4
A method of manufacturing a wiring board comprising:
- a step of attaching a base metal layer serving as a wiring conductor to an upper surface of an insulating board;
- a step of forming a first plating mask on the base metal layer to expose the base metal layer into a shape corresponding to the wiring conductor;
- a step of attaching a main conductor layer serving as the wiring conductor by electrolytic plating, on the base metal layer exposed from the first plating mask;
- a step of forming a second plating mask on the first plating mask and the main conductor layer, to expose an upper surface of the main conductor layer having a portion corresponding to a semiconductor element connection pad;
- a step of attaching a metal plating layer by electrolytic plating to the upper surface of the main conductor layer exposed from the first and second plating masks;
- a step of removing the first and second plating masks;
- a step of etching away a portion of the base metal layer to which the main conductor layer is not attached, and forming the wiring conductor comprising the base metal layer and the main conductor layer, and having the metal plating layer attached to the upper surface of the semiconductor element connection pad;
- and
- a step of forming a solder resist layer having an opening to expose the semiconductor element connection pad, on the insulating board and the wiring conductor.
Dependencies are inferred from the claim text.