Integration of the silicon impatt diode in an analog technology

A method of forming a vertical IMPATT diode in a standard planar analog process flow comprising:

• providing a substrate composed of p-type single crystal silicon;
• epitaxially depositing an n-type buried layer overlaying and touching the top surface of the substrate;
• epitaxially depositing an un-doped layer overlaying and touching the top surface of the n-type buried layer;
• forming a deep trench extending down to the substrate and completely surrounding the IMPATT diode and separating the diode from the rest of the elements in an analog circuit;
• forming a shallow trench layer covering the top surface of the wafer, wherein openings are included to provide for P++ and N++ of the IMPATT diode;
• forming an n-well extending through the P++ opening in the shallow trench layer into the un-doped layer and touching the top surface of the n-type buried layer;
• forming a deep n+ area partially separated from the n-well by a shallow trench structure, wherein the deep n+ area extends through the un-doped layer and touches the top surface of the n-type buried layer;
• forming a layer of material touching the top of the n-well selected from the group of highly doped p+ silicon, p-type SiGe, a composite layer of highly doped p+ silicon on n+ silicon, a composite layer of highly doped p+ silicon on n-type SiGe or a composite layer of p-type SiGe on n-type SiGe;
• and
• forming ohmic contacts separated from each other by a first inter-level dielectric material and separately touching the highly doped n+ layer and the layer of material touching the top of the n-well.