Circuit verifying apparatus, circuit verifying method, and circuit verifying program
AssigneeNEC Corporation
InventorSHUSAKU UCHIBORI
Life of this patent
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Abstract
A circuit verifying apparatus, which calculates code coverage of a measurement-target logic circuit written in a hardware description language, including: a coverage observing unit which measures whether a code corresponding to a measurement-target signal extracted from each of plural observation points, which are arranged inside the measurement-target logic circuit, is carried out or not; and a coverage collecting unit which collects measurement results acquired by the coverage observing unit, and measures quantitatively a ratio of tested codes to whole codes which describe the measurement-target logic circuit, and outputs the ratio.
Claims11
A circuit verifying apparatus, which calculates code coverage of a measurement-target logic circuit written in a hardware description language, comprising:
- a coverage observing unit which measures whether a code corresponding to a measurement-target signal extracted from each of plural observation points, which are arranged inside said measurement-target logic circuit, is carried out or not;
- and
- a coverage collecting unit which collects measurement results acquired by said coverage observing unit, and measures quantitatively a ratio of tested codes to whole codes which describe said measurement-target logic circuit, and outputs said ratio.
A circuit verifying method, which uses a circuit verifying apparatus calculating code coverage of a measurement-target logic circuit written in a hardware description language, comprising:
- extracting a measurement-target signal from each of plural observation points which are arranged inside said measurement-target logic circuit;
- measuring whether a code corresponding to said measurement-target signal is carried out or not;
- collecting said measurement results;
- and
- making said coverage collecting unit measure quantitatively a ratio of tested codes to whole codes which describe said measurement-target logic circuit, and output said ratio.
A non-transitory computer-readable computer medium storing a circuit verifying program, which is loaded in a circuit verifying apparatus calculating code coverage of a measurement-target logic circuit which is written in a hardware description language, makes a processor of said circuit verifying apparatus carry out:
- a procedure of extracting a measurement-target signal from each of plural observation points which are arranged inside said measurement-target logic circuit;
- a procedure of measuring whether a code corresponding to said measurement-object signal is carried out or not;
- a procedure to collect results of measuring whether each said code is carried out or not;
- and
- a procedure of measuring quantitatively a ratio of tested codes to whole codes which describe said measurement-target logic circuit, and outputting said ratio.
Dependencies are inferred from the claim text.