Semiconductor device, semiconductor system and control method of semiconductor device
AssigneeSK hynix Inc.
InventorSung-Hwa OK
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a mode register set suitable for generating a first internal control signal and a second internal control signal, a per-DRAM addressability (PDA) driving unit suitable for resetting the mode register set in response to the first internal control signal and an input value of data inputted through a data pad, and a cycle redundancy check (CRC) driving unit suitable for performing a CRC operation by checking whether or not data are correctly inputted through the data pad without an error in response to the first internal control signal and the second internal control signal.
Claims20
A semiconductor device comprising:
- a mode register set suitable for generating internal control signals including a first internal control signal and a second internal control signal;
- a per-DRAM addressability (PDA) driving unit suitable for resetting the mode register set in response to the first internal control signal and an input value of data inputted through a data pad;
- and
- a cycle redundancy check (CRC) driving unit suitable for performing a CRC operation by checking whether or not data are correctly inputted through the data pad without an error in response to the first internal control signal and the second internal control signal.
A semiconductor system comprising:
- a memory device suitable for performing one of a per-DRAM addressability (PDA) operation and a cycle redundancy check (CRC) operation in response to a plurality of internal control signals generated by a mode register setting operation;
- and
- a memory controller suitable for controlling the memory device,
- wherein the memory device comprises:
- a per-DRAM addressability (PDA) driving unit suitable for resetting a mode register set in response to a first internal control signal of the plurality of internal control signals and an input value of data inputted through a data pad;
- and
- a cycle redundancy check (CRC) driving unit suitable for performing a CRC operation by checking whether or not data are correctly inputted through the data pad without an error in response to the first internal control signal and a second internal control signal of the plurality of internal control signals.
A control method of a semiconductor device comprising:
- generating internal control signals including a first internal control signal and a second internal control signal by a mode register setting operation;
- resetting a mode register set in response to the first internal control signal and an input value of data inputted through a data pad;
- and
- performing a CRC operation by detecting whether data are inputted through the data pad without an error in response to the first internal control signal and the second internal control signal.
Dependencies are inferred from the claim text.