Semiconductor integrated circuit and method of processing in semiconductor integrated circuit

A method of processing in a semiconductor integrated circuit that includes a first combinational circuit to output a state value depending on an input signal and a parity value of the state value, a first flip-flop circuit to store the state value and the parity value output by the first combinational circuit, a first parity check circuit to perform a parity check based on the state value and the parity value stored in the first flip-flop circuit and output a first parity error when detecting an error, a second flip-flop circuit to store the state value and the parity value output by the first combinational circuit, and a second parity check circuit to perform a parity check based on the state value and the parity value stored in the second flip-flop circuit and output a second parity error when detecting an error, the method comprising:

• allowing a selector to output the state value stored in the first flip-flop circuit to the first combinational circuit when the first parity error is not output but the second parity error is output;
• allowing the selector to output the state value stored in the second flip-flop circuit to the first combinational circuit when the first parity error is output but the second parity error is not output;
• and
• allowing the first combinational circuit to output a current state value depending on the state value output by the selector and the input signal.