Method for healing reset errors in a magnetic memory
AssigneeEverspin Technologies, Inc.
InventorsJon Slaughter, Dimitri Houssameddine, Thomas Andre, Syed M. Alam
Life of this patent
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Abstract
A method is provided for healing reset errors for a magnetic memory using destructive read with selective write-back, including for example, a self-referenced read of spin-torque bits in an MRAM. Memory cells are prepared for write back by one of identifying memory cells determined in error using an error correcting code and inverting the inversion bit for those memory cells determined in error; identifying memory cells determined in error using an error correcting code and resetting a portion of the memory cells to the first state; and resetting one or more memory cells to the first state.
Claims19
A method of healing reset errors in a plurality of memory cells in a memory array, the method comprising:
- performing a self-referenced read to identify one of a first state or a second state associated with each of the memory cells including resetting each of the memory cells to the first state;
- identifying by an error correcting code an error in at least one memory cell;
- performing an action on one or more memory cells, the action consisting of one of the group selected from:
- selectively setting an inversion memory cell to the second state, determined at least in part by the result of the error correction operation;
- and
- resetting at least a portion of the memory cells to the first state;
- and
- selectively setting to the second state each of the respective memory cells determined to be associated therewith.
A method of healing reset errors in a plurality of memory cells in a memory array, the method comprising:
- performing a self-referenced read to identify one of a first state or a second state associated with each of the memory cells including resetting each of the memory cells to the first state;
- resetting at least a portion of the memory cells to the first state;
- and
- selectively setting to the second state each of the memory cells determined to be associated therewith.
A memory device comprising:
- a plurality of memory cells;
- and
- circuitry coupled to the memory cells and configured to:
- perform a self-referenced read to identify one of a first state or a second state associated with each of the memory cells including resetting each of the memory cells to the first state;
- and
- perform an action to correct reset errors on one or more memory cells, the action consisting of one of the group selected from:
- selectively set an inversion memory cell to the second state, determined at least in part by the result of an error correction operation;
- and
- reset at least a portion of the memory cells to the first state;
- and
- set to the second state each of the memory cells determined to be associated therewith.
Dependencies are inferred from the claim text.