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US 2014/0372777 A1Published application
Adaptive latency tolerance for power management of memory bus interfaces
AssigneeApple Inc.
InventorsIdan Reller, Rachel Menes, Arie Peled, Guy Kushtai
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Abstract
A method includes, in a memory system that includes a host and a storage device connected by a bus interface, assessing in the storage device a power supply state of the memory system. In the storage device a latency tolerance is selected for the bus interface based on the assessed power supply state. The selected latency tolerance is indicated from the storage device to the host, for application to the bus interface.
Claims20
A method, comprising:
- in a memory system that includes a host and a storage device connected by a bus interface, assessing in the storage device a power supply state of the memory system;
- selecting in the storage device a latency tolerance for the bus interface based on the assessed power supply state;
- and
- indicating the selected latency tolerance from the storage device to the host, for application to the bus interface.
1 more element
An apparatus, comprising:
- a host interface, which is configured to communicate with a host over a bus interface;
- and
- a processor, which is configured to assess a power supply state of a memory system that comprises the host and the apparatus, to select a latency tolerance for the bus interface based on the assessed power supply state, and to indicate the selected latency tolerance to the host, for application to the bus interface.
A memory system, comprising:
- a host;
- and
- a storage device, which is configured to communicate with the host over a bus interface, to assess a power supply state of the memory system, to select a latency tolerance for the bus interface based on the assessed power supply state, and to indicate the selected latency tolerance to the host, for application to the bus interface.
Dependencies are inferred from the claim text.