Vector execution unit for digital signal processor

A vector execution unit for use in a digital signal processor, said vector execution unit comprising:

• A first vector input port for receiving at least a first input data vector from at least a first unit in the digital signal processor, respectively,
• An instruction decoding unit arranged to decode instructions received from a program memory of the digital signal processor and control at least one datapath in the vector execution unit to execute the instructions,
• A vector output port for feeding the result of the instruction execution to at least another unit in the digital signal processor,
• At least one data-path,
• said vector execution unit being characterized in that the instruction decoding unit is arranged to control the data-path to perform a comparison related to the first input data vector,
• and in that the processor comprises an integer port arranged to output the result of the comparison in the form of a decision vector to a memory unit or a functional unit in the digital signal processor.