# US 2014/0369457 A1 · Shift register circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0369457 A1 - Document ID: US20140369457A1 - Status: Published application - Kind: A1 - Application number: 14/057,317 - Filed: 2013-10-18 - Published: 2014-12-18 - Earliest claimed: 2013-06-14 - Assignees: Au Optronics Corporation - Applicants: Au Optronics Corp. - Inventors: Wei-Li LIN; Chun-Huan CHANG; Che-Wei TUNG; Shu-Fang HOU - Web page: https://patentgrep.com/patent/US20140369457A1 ## CPC - G11C 19/28: using semiconductor elements (G11C19/14, G11C19/36 take precedence) - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G11C: STATIC STORES (semiconductor memory devices H10B) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A shift register circuit includes a first pull-down control circuit, a first pull-down circuit electrically connecting to the first pull-down control circuit, a first inversed pulse signal coupling circuit outputting a first inversed pulse signal, a first pull-up circuit outputting a first gate control signal, and a first main pull-down circuit electrically connecting to the first pull-up circuit. The first pull-up circuit receives a first driving signal and a first pulse signal to output the first gate control signal. The first inversed pulse signal coupling circuit duly outputs the first inversed pulse signal to compensate a surge occurring in the first driving signal. ## Claims ### Claim 1 A shift register circuit, comprising: a first pull-down control circuit; a first pull-down circuit electrically connecting to the first pull-down control circuit; a first inversed pulse signal coupling circuit configured to output a first inversed pulse signal; a first pull-up circuit configured to receive a first driving signal and a first pulse signal to output a first gate control signal; and a first main pull-down circuit electrically connecting to the first pull-up circuit and configured to control the first driving signal; wherein when a first control signal outputted by the first pull-down control circuit is at a first preset logic level, the first pull-down control circuit disables the first inversed pulse signal coupling circuit, and when the first control signal outputted by the first pull-down control circuit is not at the first logic level according to the first driving signal changed, the first inversed pulse signal coupling circuit outputs the first inversed pulse signal to compensate a surge in the first driving signal. ### Claim 2 (depends on 1) The shift register circuit according to claim 1, wherein the first inversed pulse signal coupling circuit comprises a first transistor, and the first transistor is configured to receive the first inversed pulse signal and via a first capacitor, couple the first inversed pulse signal to the first driving signal. ### Claim 3 (depends on 1) The shift register circuit according to claim 1, wherein the first inversed pulse signal coupling circuit further comprises a first inverter which is configured to receive the first pulse signal to output the first inversed pulse signal. ### Claim 4 (depends on 1) The shift register circuit according to claim 1, wherein the first inversed pulse signal coupling circuit is supplied with a DC voltage. ### Claim 5 (depends on 1) The shift register circuit according to claim 1, wherein the first inversed pulse signal coupling circuit is configured to receive a low-frequency signal whose frequency is lower than a frequency of the first pulse signal. ### Claim 6 (depends on 1) The shift register circuit according to claim 1, further comprising a second inversed pulse signal coupling circuit and a second pull-down control circuit, wherein the second pull-down control circuit disables the second inversed pulse signal coupling circuit when a second control signal outputted by the first pull-down control circuit is at a second preset logic level. ### Claim 7 (depends on 6) The shift register circuit according to claim 6, wherein when the second control signal outputted by the second pull-down control circuit is not at the second preset logic level, the second inversed pulse signal coupling circuit is enabled to output a second inversed pulse signal and couple the second inversed pulse signal to the first driving signal. ### Claim 8 (depends on 7) The shift register circuit according to claim 7, wherein when the second control signal outputted by the second pull-down control circuit is not at the second preset logic level according to the second inversed pulse signal, the surge is compensated by the second inversed pulse signal. ### Claim 9 (depends on 1) The shift register circuit according to claim 1, wherein the first preset logic level is a low logic level. ### Claim 10 (depends on 1) The shift register circuit according to claim 1, wherein the first pull-down control circuit is configured to receive a DC signal.