Apparatuses and methods for mapping memory addresses to redundant memory

An apparatus, comprising

• a plurality of programmable element sets, each of the programmable element sets of the plurality of programmable element sets including programmable elements configured to be programmed with a memory address to be mapped and respective location information;
• a redundant memory element configured to have a memory address mapped thereto, wherein the redundant memory element is included in a redundant memory section located by the location information programmed in any of the plurality of programmable element sets;
• and
• a redundant address latch associated with the redundant memory element and configured to latch the memory address programmed in the programmable element set of the plurality of programmable elements sets that includes the location information locating the redundant memory section including the redundant memory element.

A method, comprising:

• decoding location information for redundant memory, the redundant memory including redundant memory elements;
• checking availability of a first redundant memory element included in the redundant memory;
• associating a memory address with the first redundant memory element responsive to the first redundant memory element being available;
• and
• checking availability of a second redundant memory element included in the redundant memory responsive to the first redundant memory element not being available.

A method, comprising:

• latching a first memory address in a first redundant address latch associated with a first redundant memory element, wherein the first redundant memory element is included in a first redundant memory section associated with a first memory section and including a first plurality of redundant memory elements limited to having memory addresses of the first memory section mapped thereto;
• and
• latching a second memory address in a second redundant address latch associated with a second redundant memory element, wherein the second redundant memory element is included in a second redundant memory section associated with a second memory section and including a second plurality of redundant memory elements limited to having memory addresses of the second memory section mapped thereto,
• wherein the first and second redundant memory sections are different memory sections, and wherein the first memory address is programmed in a first programmable element set of a programmable element block and the second memory address is programmed in a second programmable element set of the programmable element block.