Ultra-Low Power Programming Method for N-Channel Semiconductor Non-Volatile Memory

Abstract

An Ultra-low power programming method for N-channel semiconductor Non-Volatile Memory (NVM) is disclosed. In contrast to the grounded voltage at the source electrode of an N-channel semiconductor NVM for the conventional Channel Hot Electron Injection (CHEI) programming, the source electrode in the programming method of the invention is necessarily floating with no voltage bias to prevent applied electrical fields toward the source electrode. The drain electrode of the N-channel semiconductor NVM is reversely biased with a positive voltage VDB relative to the substrate to facilitate the valence band electrons in the P-type substrate to tunnel to the conducting band of the N-type drain electrode. A positive high gate voltage pulse is then applied to the gate electrode of the N-channel semiconductor NVM to collect the surface energetic electrons toward the charge storage material.

Dependencies are inferred from the claim text.