Semiconductor memory device and method of operating the same
AssigneeSK hynix Inc.
InventorsSeung Hwan BAIK, Gyu Seog CHO
Life of this patent
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Abstract
A semiconductor memory device and a method of operating the same perform a program loop, including a program operation and a program verification operation based on a sub-verification voltage smaller than a target verification voltage and the target verification voltage, to the memory cells until a threshold voltage of the memory cells is greater than the target verification voltage. A positive voltage, supplied to the bit line of the memory cell of which the threshold voltage is higher than the sub-verification voltage, is increased whenever the program operation is performed, and thus a threshold voltage distribution of the memory cells may be improved.
Claims17
A semiconductor memory device comprising:
- memory cells;
- and
- a peripheral circuit suitable for performing a program loop, including a program operation and a program verification operation based on a sub-verification voltage, which is smaller than a target verification voltage, and the target verification voltage, to the memory cells until a threshold voltage of the memory cells is greater than the target verification voltage,
- wherein the peripheral circuit increases a positive voltage, supplied to a bit line of a memory cell of which a threshold voltage is higher than the sub-verification voltage, whenever the program operation is performed.
A method of operating a semiconductor memory device, the method comprising:
- performing a program loop, including a program operation and a program verification operation based on a sub-verification voltage, which is smaller than a target verification voltage, and the target verification voltage, to the memory cells until a threshold voltage of the memory cells is greater than the target verification voltage,
- wherein a positive voltage that is smaller than a program inhibition voltage is supplied to a bit line of a memory cell of which a threshold voltage is higher than the sub-verification voltage and is smaller than the target verification voltage, in the program operation, and
- the positive voltage is increased whenever the program operation is performed, after the threshold voltage of the memory cell is higher than the sub-verification voltage.
Dependencies are inferred from the claim text.