Semiconductor memory device and operation method thereof
AssigneesIndustry-University Cooperation Foundation Hanyang University, SK hynix Inc.
InventorsSung-Wook CHOI, Jung-Hoon HAM, Young-Il KIM, Sang-Sun LEE
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Abstract
A semiconductor memory device includes a memory cell suitable for having a predetermined cell state based on a data stored therein, a control signal generation unit suitable for generating a control signal for changing the cell state of the memory cell during a reading operation, an information storage unit suitable for storing a variation status information of the control signal to which a moment when the cell state of the memory cell changes is reflected, and an output unit suitable for outputting the variation status information of the control signal stored in the information storage unit as a signal corresponding to the data stored in the memory cell.
Claims13
A semiconductor memory device, comprising:
- a memory cell suitable for having a predetermined cell state based on a data stored therein;
- a control signal generation unit suitable for generating a control signal for changing the cell state of the memory cell during a reading operation;
- an information storage unit suitable for storing a variation status information of the control signal to which a moment when the cell state of the memory cell changes is reflected;
- and
- an output unit suitable for outputting the variation status information of the control signal stored in the information storage unit as a signal corresponding to the data stored in the memory cell.
A semiconductor memory device, comprising:
- a plurality of memory cells configured in a string structure and coupled with bit lines;
- a read voltage control unit suitable for changing a voltage level of a read voltage that is applied to a target memory cell to be read among the multiple memory cells;
- a voltage detection unit suitable for detecting a voltage level of the bit lines based on the read voltage and generating a detection signal when a pass current is formed in the target memory cell;
- and
- an information storage unit suitable for storing the voltage level of the read voltage in response to the detection signal.
A semiconductor memory device, comprising:
- a plurality of memory cells configured in a string structure and coupled with bit lines;
- a read voltage control unit suitable for changing a voltage level of a read voltage that is applied to a target memory cell to be read among the multiple memory cells;
- a voltage detection unit suitable for detecting a voltage level of the bit lines based on the read voltage and generating a detection signal when a pass current is formed in the target memory cell;
- a counting unit suitable for generating a count value representing a time lapse between a moment when the reading operation is enabled and a moment when the pass current is formed in the target memory cell;
- and
- an information storage unit suitable for storing the count signal in response to the detection signal.
Dependencies are inferred from the claim text.