Pseudo block operation mode in 3d nand
AssigneeSanDisk Technologies LLC
InventorsXiying Costa, Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Mui
Life of this patent
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Abstract
A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each group of the different groups comprises multiple adjacent storage elements of the plurality of storage elements; and a control circuit in communication with the string, the control circuit, to perform a Pseudo Block Operation Mode.
Claims29
A three-dimensional (3D) NAND stacked non-volatile memory device, comprising:
- a plurality of NAND strings in a block, each NAND string comprising a plurality of non-volatile storage elements, each NAND string comprising a channel that extends vertically through layers of the 3D NAND stacked non-volatile memory device, wherein the block comprises pseudo blocks that each comprise a portion of each of the NAND strings, wherein each of the NAND strings is a member of each of the pseudo blocks;
- and
- a control circuit in communication with the NAND strings, the control circuit is configured to operate in a pseudo block operation mode that performs operations on the plurality of NAND strings on a pseudo block level.
A method of operating a three-dimensional (3D) NAND stacked non-volatile memory device comprising a plurality of NAND strings in a block, each NAND string comprising a plurality of non-volatile storage elements, each NAND string comprising a channel that extends vertically through layers of the 3D NAND stacked non-volatile memory device, wherein the block comprises pseudo blocks that each comprise a portion of each of the NAND strings, wherein each of the NAND strings is a member of each of the pseudo blocks, the method comprising:
- performing operations associated with the plurality of NAND strings in the Mock on a pseudo block level.
A three dimensional (3D) NAND stacked non-volatile memory device, comprising:
- a NAND string comprising a plurality of non-volatile storage elements, the NAND string comprises a channel that extends vertically through layers of the 3D NAND stacked non-volatile memory device;
- and
- a control circuit in communication with the NAND string, wherein the control circuit is configured to perform an erase of a portion of the NAND string while leaving other non-volatile storage elements on the NAND string programmed.
A three dimensional (3D) NAND stacked non-volatile memory device, comprising:
- a NAND string comprising a plurality of non-volatile storage elements, the NAND string comprises a channel that extends vertically through layers of the 3D NAND stacked non-volatile memory device, wherein the NAND string comprises memory cells that reside in a memory hole in the layers;
- and
- a control circuit in communication with the NAND string, the control circuit is configured to apply a boosting voltage to a control gate of an unselected non-volatile storage element on the NAND string that is not selected for programming, a magnitude of the boosting voltage depends on location of the unselected non-volatile storage element on the NAND string, wherein a magnitude of the boosting voltage for a given memory cell depends on a size of the memory hole associated with the given memory cell.
Dependencies are inferred from the claim text.