Semiconductor memory device and semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsMin-hee CHO, Satoru YAMADA, Sang-ho SHIN, Sung-sam LEE
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Abstract
A semiconductor memory device includes: a memory unit including a first memory sub region including a first memory cell and a second memory sub region including a second memory cell; a temperature information obtaining unit that obtains temperature information; a temperature estimation unit that estimates a first temperature of the first memory sub region and a second temperature of the second memory sub region based on the temperature information; a first sub region control unit that controls the first memory sub region based on the first temperature; and a second sub region control unit that controls the second memory sub region based on the second temperature.
Claims31
A semiconductor memory device, comprising:
- a memory unit including a first memory sub region having a first memory cell and a second memory sub region having a second memory cell;
- a temperature information obtaining unit to obtain temperature information;
- a temperature estimation unit to estimate a first temperature of the first memory sub region and a second temperature of the second memory sub region based on the temperature information;
- a first sub region control unit that controls the first memory sub region based on the first temperature;
- and
- a second sub region control unit that controls the second memory sub region based on the second temperature.
A semiconductor memory device, comprising:
- a memory unit including a plurality of memory banks;
- a temperature detection unit to detect a representative temperature;
- a temperature estimation unit to estimate a temperature of each of the plurality of memory banks based on the representative temperature;
- and
- a plurality of refresh units to refresh memory cells of a corresponding memory bank during a refresh period, wherein the memory cells are to be refreshed based on the temperature of each of the plurality of memory banks estimated by the temperature estimation unit.
A semiconductor package, comprising:
- at least one semiconductor memory chip which includes:
- a memory unit including a first memory sub region having a first memory cell and a second memory sub region having a second memory cell;
- a temperature information obtaining unit to obtain temperature information;
- a temperature estimation unit to estimate a first temperature of the first memory sub region and a second temperature of the second memory sub region based on the temperature information;
- a first sub region control unit that controls the first memory sub region based on the first temperature;
- and
- a second sub region control unit that controls the second memory sub region based on the second temperature.
A semiconductor package, comprising:
- an application processor chip;
- a semiconductor memory chip disposed above or below the semiconductor memory chip;
- and
- at least one temperature sensor in at least one of the application processor chip or the semiconductor memory chip, wherein the semiconductor memory chip includes:
- a plurality of memory banks;
- a temperature information obtaining unit to obtain temperature information from the at least one temperature sensor;
- a temperature estimation unit to estimate a temperature of each of the plurality of memory banks;
- and
- a plurality of memory bank control units to control corresponding ones of the memory banks based on the corresponding estimated temperatures of the plurality of memory banks.
An apparatus, comprising:
- a signal line to receive temperature information of a memory;
- and
- a controller to estimate a first temperature of a first location of the memory and a second temperature of a second location of the memory based on the temperature information, and to control a first sub region of the memory based on the first temperature and to control a second sub region of the memory based on the second temperature, wherein the first temperature is different from the second temperature.
Dependencies are inferred from the claim text.