Hardware-accelerated resource tiling
AssigneeMicrosoft Technology Licensing, LLC
InventorsAmar Patel, Matt Lee, William Kristiansen, Chas Boyd, Matthew Sandy, Allison Klein
Life of this patent
Estimating the term…
Abstract
In one embodiment, a graphics processing unit 170 may support a logical resource using a physical tile pool 350 for sparse data sets. The graphics processing unit 170 may allocate a physical memory allocation into a primary physical tile pool 350. The graphics processing unit 170 may define a mapping for a logical tile set 300 for a logical resource. The graphics processing unit 170 may selectively map a primary logical tile 320 of the logical tile set 300 to a primary physical tile 360 of the primary physical tile pool 350.
Claims20
A machine-implemented method, comprising:
- allocating a physical memory allocation into a primary physical tile pool;
- defining a logical mapping for a logical tile set for a logical resource;
- and
- mapping selectively a primary logical tile of the logical tile set to a primary physical tile of the primary physical tile pool.
A tangible machine-readable medium having a set of instructions detailing a method stored thereon that when executed by one or more processors cause the one or more processors to perform the method, the method comprising:
- allocating a physical memory allocation into a primary physical tile pool;
- defining a logical mapping of a logical tile set for a logical resource;
- storing a graphic texture data set referenced by the logical resource;
- and
- mapping selectively a primary logical tile of the logical tile set to a primary physical tile of the primary physical tile pool.
A graphics processing unit, comprising:
- a processor that allocates a physical memory allocation into a primary physical tile pool and defines a mapping for a logical tile set for a logical resource;
- an internal physical memory that stores a graphic texture data set referenced by the logical resource;
- and
- a page table manager that selectively maps a primary logical tile of the logical tile set to a primary physical tile of the primary physical tile pool.
Dependencies are inferred from the claim text.