Time to digital converter

A time to digital converter comprises:

• a first delay line including a plurality of cascaded first delay cells, receiving a start signal, and delaying the start signal by a first delay time and outputting the delayed signal each time the start signal passes through the first delay cell;
• a plurality of first time comparators receiving an output signal and a stop signal of the first delay, and comparing application times of the two signals;
• a multiplexer selecting a signal whose application time is later than that of the stop signal and having the smallest time difference with the stop signal from output signals of the plurality of first delay cells by using an output signal of the first time comparator;
• a second delay line including a plurality of cascaded second delay cells, receiving the signal selected by the multiplexer, and delaying the signal selected by the multiplexer by a second delay time and outputting the delayed signal each time the signal selected by the multiplexer passes through the second delay cell;
• a third delay line including a plurality of cascaded third delay cells, receiving the stop signal, and delaying the stop signal by a third delay time and outputting the delayed signal each time the stop signal passes through the third delay cell;
• and
• a plurality of second time comparators receiving an output signal of the second delay cell and an output signal of the third delay cell, and comparing application times of the two signals,
• wherein an output signal of one second delay cell included in the second delay line is compared with an output signal of at least two third delay cells included in the third delay line.

A time to digital converter comprising:

• a clock count measurement unit measuring the number of clocks between a start signal and a stop signal;
• an interface unit outputting a delay signal by delaying the stop signal;
• a conversion unit measuring a time difference between the stop signal and the delay signal, and converting the measured time difference into a digital code;
• and
• an output logic unit outputting the time difference between the start signal and the stop signal as a digital code on the basis of the number of counts and the time difference,
• wherein the conversion unit comprises:
• a first measurement unit measuring the time difference between the start signal and the stop signal by a first time unit by using a first delay line;
• a second measurement unit measuring a time difference between the delay signal and a stop signal delayed by the first delay line by a second time unit by using a second delay line and a third delay line, wherein one delay cell included in the second delay line matches at least two delay cells included in the third delay line;
• and
• an output unit outputting a final time difference between the stop signal and the delay signal as a digital code on the basis of measurement results of the first measurement unit and the second measurement unit.