Quantization Noise Coupling Delta Sigma ADC with a Delay in the Main DAC Feedback
AssigneeMicrochip Technology Incorporated
InventorsVincent Quiquempoix, Fabien Vaucher
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Abstract
A delta-sigma modulator has a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function, a second summing point adding an output signal from said transfer function to the input signal and subtracting a second feedback signal, a first integrator receiving an output signal from the second summing point, a quantizer receiving an output signal from the integrator and generating an output bitstream, and a digital-to-analog converter receiving the bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay.
Claims22
A delta-sigma modulator comprising:
- a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function;
- a second summing point adding an output signal from said transfer function to said input signal and subtracting a second feedback signal;
- a first integrator receiving an output signal from said second summing point;
- a quantizer receiving an output signal from said integrator and generating an output bitstream;
- a digital-to-analog converter receiving said bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay.
The delta-sigma modulator according to claim 9, further comprising a latch signal generated at the end of the transfer phase and used to latch a signal for the quantizer.
A method for operating a delta-sigma modulator comprising:
- subtracting a first feedback signal from an input signal and forwarding a result to a transfer function;
- adding an output signal from said transfer function to said input signal and subtracting a second feedback signal and integrating a resulting output signal;
- quantizing the integrated signal and generating an output bitstream;
- converting said bitstream into an analog signal and delaying the analog signal by a one sample delay to provide the first and second feedback signal.
Dependencies are inferred from the claim text.