An apparatus for estimating a sampling delay error between a first analog-to-digital converter (ADC) and a second ADC in a time-interleaved ADC, comprising:
- a delay filter, coupled to the second ADC, the delay filter arranged for receiving a second digital output signal generated by the second ADC based on an analog input signal, determining a delay amount according to a predetermined sampling delay between the first ADC and the second ADC and an amount of delay adjustment, and applying the delay amount to the second digital output signal to generate a delayed digital output signal, wherein the amount of delay adjustment is used to estimate the sampling delay error;
- and
- a feedback adjustment circuit, coupled to the first ADC and the delay filter, the feedback adjustment circuit arranged for receiving a first digital output signal generated by the first ADC based on the analog input signal, calculating a difference between the first digital output signal and the delayed digital output signal;
- and feeding back the difference to the delay filter to adjust the amount of delay adjustment.