Mid-band psrr circuit for voltage controlled oscillators in phase lock loop

An apparatus for reducing supply voltage noise, comprising:

• a VCO receiving a control signal and generating an output signal that includes the supply voltage noise;
• a noise-reduction circuit coupled to the VCO, the noise-reduction circuit configured to generate a voltage supply compensation signal that reduces the supply voltage noise present in the output signal;
• and
• a capacitive coupling circuit configured to apply the voltage supply compensation signal to a supply node of the VCO.

An apparatus, comprising:

• a first circuit configured to receive a power supply subject to supply noise and generate an output signal with the supply noise;
• and
• a noise-reduction circuit configured to receive the power supply, generate a supply compensation signal based on the supply noise, and supply the supply compensation signal to the first circuit to reduce the supply noise in the output signal;
• the noise-reduction circuit comprising:
• two FETs coupled in series at a series connection point, and
• a capacitor coupled between the series connection point and an internal supply node of the first circuit.

An apparatus, comprising:

• a voltage supply input subject to supply noise;
• a VCO that generates an output signal having the supply noise;
• and
• a noise-reduction circuit coupled to the voltage supply input and configured to supply a compensation signal that reduces the supply noise in the output signal of the VCO;
• the noise-reduction circuit comprising:
• a first FET having a first transconductance, and
• a second FET coupled in series to the first FET, the second FET having a second transconductance that is different than the first transconductance, wherein the compensation signal is generated at a series connection point between the first FET and the second FET.

An apparatus, comprising:

• a voltage supply input subject to supply noise;
• a VCO that generates an output signal having the supply noise and comprising:
• a supply FET that passes the supply noise therethrough and comprising a first conduction terminal coupled to the voltage supply input, a second conduction terminal, and a control terminal,
• a first capacitor to capacitively couple the control terminal of the supply FET to the second conduction terminal of the supply FET and having a first capacitance, and
• a second capacitor to capacitively coupled the first conduction terminal of the supply FET to the second conduction terminal of the supply FET and having a second capacitance;
• and
• a noise-reduction circuit configured to apply a voltage supply compensation signal to a supply node of the VCO input via a third capacitor having a third capacitance equal to a sum of the first capacitance and the second capacitance, wherein the compensation signal reduces the supply noise in the output signal of the VCO.