Efficient Voltage Doubler
AssigneeSanDisk Technologies LLC
InventorFeng Pan
Life of this patent
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AssigneeSanDisk Technologies LLC
InventorFeng Pan
Estimating the term…
A charge pump circuit using a voltage doubler-type of circuitry for generating an output voltage is described. An output generating stage uses a voltage double structure, except that the transistors in each leg are not cross-coupled to the other leg, but instead are controlled by an auxiliary section. The auxiliary section has a voltage doubler structure, but is not used to drive the load, but instead provides the gate voltage for the precharge section using the same levels as used for the corresponding transistors in the auxiliary section. This arrangement can be particularly advantageous for applications using low supply voltages to address self-loading effect due to loading. As the auxiliary section does not drive the load, its elements can be sized smaller. Additional improvement can be obtained by using separate clock drivers for the auxiliary section to address secondary self-loading effect due to loading.
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The charge pump circuit of claim 9, wherein the first and second clock signals are provided to the output generation stage from a first clock driver circuitry and the first and second clock signals are provided to the auxiliary section stage from a second, different clock driver circuitry.
The charge pump circuit of claim 9, wherein the third and fourth transistors are sized smaller than the first and second transistors and the third and fourth capacitors are sized smaller than the first and second capacitors.
The charge pump circuit of claim 9, wherein the first and second output gates are implemented as diode connected transistors.
The charge pump circuit of claim 9, wherein the first and second output gates are implemented as fifth and sixth transistors respectively connected between the first and second nodes and the output node, where gates of the fifth and sixth transistors are respectively connected to received boosted versions of the first and second clock signals.
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A charge pump circuit to generate an output voltage provided at an output node, including:
Dependencies are inferred from the claim text.