Multi-processor computer architecture incorporating distributed multi-ported common memory modules

A method for processing data requests from an array comprising a plurality of interconnected processors and memory modules, said method comprising:

• directing a data request to a first one of said plurality of memory modules;
• servicing said data request if said data resides on said first one of said plurality of memory modules, otherwise directing said data request to a second adjacent one of said plurality of memory modules;
• and
• returning said data requested to a direct coupled processor if said data request originated with one of said plurality of processors, otherwise returning said data requested to a direct coupled one of said plurality of processors if a source ID of said data request is associated with said servicing one of said plurality of memory modules, otherwise returning said data requested to a previous one of said plurality of memory modules.