System and method for configuring a channel
AssigneeNVIDIA Corporation
InventorsStephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
Life of this patent
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Abstract
A system and method are provided for configuring a plurality of pin resources. The method includes identifying a plurality of pin resources of a primary application specific integrated circuit (ASIC) device and configuring the plurality of pin resources based on a pin distribution between a first interface and a second interface, where the first interface provides a first communication path between the primary ASIC device and a first device, and the second interface provides a second communication path between the primary ASIC device and a second device.
Claims20
A method, comprising:
- identifying a plurality of pin resources of a primary application specific integrated circuit (ASIC) device;
- and
- configuring the plurality of pin resources based on a pin distribution between a first interface and a second interface, wherein the first interface provides a first communication path between the primary ASIC device and a first device and the second interface provides a second communication path between the primary ASIC device and a second device.
A system, comprising.
- a first device;
- a second device;
- and
- a primary application specific integrated circuit (ASIC) device comprising a plurality of pin resources, wherein the plurality of pin resources is configured based on a pin distribution between a first interface that provides a first communication path between the primary ASIC device and the first device and a second interface that provides a second communication path between the primary ASIC device and the second device.
An integrated circuit device, comprising:
- pin resources comprising pads coupled to off-chip pins of the integrated circuit device;
- a memory controller circuit comprising a first interface;
- a network interface controller circuit comprising a second interface;
- and
- transmitter circuitry that is configurable to selectively couple either a first signal of the first interface or a second signal of the second interface to a first pad of the pin resources based on a pin distribution between the first interface and the second interface.
Dependencies are inferred from the claim text.