Testing an integrated circuit

A test environment for testing an integrated circuit comprising:

• a virtual test engine and a test system with an integrated circuit tester, wherein said integrated circuit is connected to said virtual test engine via said integrated circuit tester, and said integrated circuit tester is connected to said integrated circuit via an interface;
• said virtual test engine to communicate with said integrated circuit tester via a command interface to perform a functional test during a functional test mode and to perform a non-functional test during a non-functional test mode of said integrated circuit, wherein said integrated circuit tester comprises a test vector memory to generate at least one test pattern;
• said virtual test engine to create and transmit at least one of functional or non-functional test commands to said integrated circuit tester;
• said integrated circuit tester to create and apply test patterns as stimulus data to said integrated circuit based on said functional test commands, to receive and analyze response data from said integrated circuit, and to transmit test results including said response data to said virtual test engine for further analyzing;
• said virtual test engine to enable said non-functional test mode of said integrated circuit in case a failure is detected during said functional test, and said integrated circuit tester to shift a serial bit stream out of said integrated circuit in said non-functional test mode, and to transmit said serial bit stream as an error bit stream to said virtual test engine for further analyzing;
• and
• said virtual test engine to create and transmit at least one of further functional or non-functional test commands to said integrated circuit tester based on at least one of said test results or said error bit stream.

A computer program product for testing an integrated circuit in a test environment, said computer program product comprising:

• a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
• enabling a functional test mode of an integrated circuit, wherein said integrated circuit is connected to a virtual test engine of the test environment via an integrated circuit tester of the test environment, said virtual test engine to communicate with said integrated circuit tester via a command interface to perform functional test during functional test mode and to perform non-functional test during non-functional test mode, and said integrated circuit tester is connected to said integrated circuit via an interface;
• creating and transmitting at least one of functional or non-functional test commands to said integrated circuit tester, wherein said integrated circuit tester creates and applies test patterns as stimulus data to the integrated circuit based on said functional test commands, receives and analyzes response data from said integrated circuit, and transmits test results including said response data to said virtual test engine for further analyzing;
• enabling said non-functional test mode of said integrated circuit in case a failure is detected during said functional test;
• shifting a serial bit stream out of said integrated circuit in said non-functional test mode, wherein said integrated circuit tester transmits said serial bit stream as an error bit stream to said virtual test engine for further analyzing;
• and
• wherein said virtual test engine creates and transmits at least one of further functional or non-functional test commands to said integrated circuit tester based on at least one of said test results or said error bit stream.