Techniques for scheduling operations at an instruction pipeline
AssigneeAdvanced Micro Devices, Inc.
InventorFrancesco Spadini
Life of this patent
Estimating the term…
Abstract
A dispatch stage of a processor core dispatches designated operations (e.g. load/store operations) to a temporary queue when the resources to execute the designated operations are not available. Once the resources become available to execute an operation at the temporary queue, the operation is transferred to a scheduler queue where it can be picked for execution. By dispatching the designated operations to the temporary queue, other operations behind the designated operations in a program order are made available for dispatch to the scheduler queue, thereby improving instruction throughput at the processor core.
Claims20
A method comprising:
- dispatching a first operation from a dispatch stage of an instruction pipeline to a first queue of a set of execution units of the instruction pipeline in response to there being insufficient resources at the instruction pipeline to execute the first operation, the first operation not available to be picked for execution while stored at the first queue;
- and
- providing the first operation from the first queue to a second queue in response to sufficient resources to execute the first operation becoming available at the set of execution units, the first operation available to be picked for execution while stored at the second queue.
A method, comprising:
- in response to there being insufficient resources at an instruction pipeline to execute a first operation, dispatching the first operation to a first queue, the first operation not available to be picked for execution while stored at the first queue;
- and
- in response to dispatching the first operation to the first queue, dispatching a second operation to a second queue so that the second operation is available to be picked for execution.
An instruction pipeline of a processor comprising:
- a set of execution units comprising:
- a plurality of resources to execute operations;
- a picker to pick operations for execution;
- a first queue to store operations, the operations stored at the first queue not available to be picked by the picker;
- and
- a second queue to store operations, the operations stored at the second queue available to be picked by the picker;
- and
- a dispatch stage to:
- dispatch a first operation to the first queue in response to there being insufficient resources to execute the first operation;
- and
- dispatch a second operation to the second queue in response to there being sufficient resources to execute the second operation.
Dependencies are inferred from the claim text.