Low Power Management of Multiple Sensor Integrated Chip Architecture

Abstract

A method, device, system, or article of manufacture is provided for low-power management of multiple sensor chip architecture. In one embodiment, a method comprises, at a computing device that includes a first processor, a second processor and a third processor, performing, by the second processor, a first scan at a first scan rate for first location data using a sensor; receiving, at the second processor, from the sensor, the first location data; determining, by the second processor, a first location using the first location data; receiving, by the second processor, a modality of the computing device; in response to determining the first location, determining, by the second processor, that the modality corresponds to a predetermined state; and in response to determining that the modality corresponds to the predetermined state, performing, by the second processor, a second scan at a second scan rate for second location data using the sensor.

Dependencies are inferred from the claim text.