Low Power Management of Multiple Sensor Integrated Chip Architecture

Abstract

A method, device, system, or article of manufacture is provided for low-power management of multiple sensor chip architecture. In one embodiment, a method comprises, at a computing device that includes a first processor, a second processor and a third processor, receiving, by the first processor operating at a first clock rate, first sensor data from a first sensor operating at a first data rate; determining, by the first processor, a movement of the computing device using the first sensor data; in response to determining the movement of the computing device, performing, by the first processor, a first motion state algorithm to determine whether a modality of the computing device is a first motion state; and, in response to determining that the modality of the computing device is not the first motion state, changing, by the first processor, at least one of the first processor to operate at a second clock rate sufficient to perform a second motion state algorithm and changing the first sensor to operate at a second data rate sufficient to perform the second motion state algorithm, wherein the second motion state algorithm is used to determine whether the modality of the computing device is a second motion state.

Dependencies are inferred from the claim text.