Processing system with interspersed processors and communication elements having improved communication routing

A system, comprising:

• a plurality of processors, each at least a subset of the plurality of processors comprising at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports;
• and
• a plurality of dynamically configurable communication elements, each of at least a subset of the plurality of dynamically configurable communication elements comprising a plurality of communication ports, a first memory, and a routing engine;
• wherein the plurality of dynamically configurable communication elements are coupled to plurality of processors and interspersed among the plurality of processors;
• wherein, for a first processor, the plurality of processor ports are configured for coupling to a first subset of the plurality of dynamically configurable communication elements;
• wherein, for a first dynamically configurable communication element, the plurality of communication ports comprise a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements;
• and
• wherein the memory of the first dynamically configurable communication element is shared among the first subset of the plurality of processors.

A method for operating a multiprocessor system, the method comprising:

• executing at least one program on a plurality of processors, each processor comprising at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports;
• wherein said executing comprises:
• at least a subset of the plurality of processors communicating with each other through a plurality of dynamically configurable communication elements, each comprising a plurality of communication ports, a memory, and a routing engine, wherein the plurality of processors and the plurality of dynamically configurable communication elements are coupled together in an interspersed arrangement;
• configuring, for a first one of the dynamically configurable communication elements, a first subset of communication ports to couple to a first plural subset of the plurality of processors;
• configuring, for the first one of the dynamically configurable communication elements, a second subset of communication ports to couple to a plural subset of the dynamically configurable communication elements;
• and
• the first plural subset of the plurality of processors utilizing a memory of the first one of the dynamically configurable communication elements, wherein the memory of the first one of the dynamically configurable communication elements is shared among the first subset of the plurality of processors.