Method and apparatus for mapping a physical memory having a plurality of memory regions
AssigneeATI Technologies ULC
InventorsYury Lichmanov, Guennadi Riguer
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AssigneeATI Technologies ULC
InventorsYury Lichmanov, Guennadi Riguer
Estimating the term…
A method and apparatus are described for mapping a physical memory having different memory regions. A plurality of virtual non-uniform memory access (NUMA) nodes may be defined in system memory to represent memory segments of various performance characteristics. Memory segments of a high-bandwidth memory (HBM) system memory may be allocated to a first memory region of the physical memory having memory segments represented by a first one of the NUMA nodes. The physical memory may include a second memory region having memory segments represented by a second one of the NUMA nodes. Memory segments of system memory may be allocated to the second memory region. The physical memory may further include a third memory region having memory segments represented by a third one of the NUMA nodes. Memory segments of an interleaved uniform memory access (UMA) graphics memory may be allocated to the third memory region.
A method of mapping a physical memory having different memory regions, the method comprising:
A physical memory comprising;
A non-transitory computer-readable storage medium configured to store a set of instructions that, when executed by at least one processor, perform a portion of a process to fabricate an integrated circuit (IC) including:
Dependencies are inferred from the claim text.