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US 2014/0351520 A1Published application
Validation of cache locking using instruction fetch and execution
AssigneeInternational Business Machines Corporation
InventorsRahul S. Moharil, Lakshmi Sarath
Life of this patent
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Abstract
A technique for locking a cache memory device (or portion thereof) which includes the following actions: (i) writing full traversal branching instructions in a cache way of a cache memory device; and (ii) subsequent to the writing step, locking the cache way. The locking action is performed by adjusting cache locking data to indicate that data in the cache way will not be overwritten during normal operations of the cache memory device. The writing action and the locking action are performed by a machine.
Claims9
A method comprising:
- writing full traversal branching instructions in a cache way of a cache memory device;
- subsequent to the writing step, locking the cache way by adjusting cache locking data to indicate that any data in the cache way will not be overwritten during normal operations of the cache memory device.
Dependencies are inferred from the claim text.