Multi-serial interface stacked-die memory architecture

A memory system comprising:

• a memory vault;
• a memory vault controller configured to communicate with the memory vault;
• a communication link interface configured to communicatively couple the memory vault controller at least one of an originating device or a destination device;
• a switch configured to connect the communication link interface to the memory vault controller;
• a packet decoder coupled to the switch to receive an outbound packet sent from the originating device across an outbound of the communication link interface, to extract at least one of an outbound memory command, an outbound memory address, or an outbound memory data field from the outbound packet, and to present a set of select signals to the switch;
• and
• a packet encoder coupled to the switch to receive at least one of an inbound memory command, an inbound memory address, or inbound memory data from the memory vault controller, and to encode the inbound memory address or the inbound memory data into an inbound packet for transmission across an inbound of the communication link interface to the destination device.

A method comprising:

• concurrently transferring a plurality of streams of commands, addresses, or data;
• concurrently switching at least one of a command, an address, or data associated with each stream to a corresponding destination memory vault controller (MVC) associated with a corresponding memory vault;
• and
• performing at least one of data write operations to write the outbound data to the corresponding memory vault, data read operations to read data from the corresponding memory vault, or memory vault housekeeping operations associated with the corresponding memory vault, the data write operations, data read operations, or housekeeping operations to be performed independently from concurrent operations associated with others of a plurality of MVCs coupled to a corresponding plurality of memory vaults.