Dummy Gate Electrode of Semiconductor Device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJr-Jung Lin, Chih-Han Lin, Ming-Ching Chang
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Abstract
The disclosure relates to a dummy gate electrode of a semiconductor device. An embodiment comprises a substrate comprising a first surface; an insulation region covering a portion of the first surface, wherein the top of the insulation region defines a second surface; and a dummy gate electrode over the second surface, wherein the dummy gate electrode comprises a bottom and a base broader than the bottom, wherein a ratio of a width of the bottom to a width of the base is from about 0.5 to about 0.9.
Claims20
A method of fabricating a semiconductor device, the method comprising:
- providing a substrate having an insulation region over the substrate and a fin extending through an opening in the insulation region;
- forming a gate electrode layer over the fin and extending over the insulation region;
- and
- patterning the gate electrode layer to form a gate electrode and a dummy gate electrode using a first etching process and a second etching process, wherein the gate electrode extends over an upper portion of the fin, and wherein the dummy gate electrode is over the insulation region, the dummy gate electrode being isolated from other circuitry.
A method of fabricating a semiconductor device, the method comprising:
- providing a substrate having an insulation region over the substrate and a fin extending through an opening in the insulation region;
- forming a gate electrode extending over an upper portion of the fin;
- and
- forming a dummy gate electrode over the insulation region, the dummy gate electrode not extending over a conductive region, a topmost surface of the dummy gate electrode and a topmost surface of the gate electrode being coplanar.
A method of fabricating a semiconductor device comprising:
- providing a substrate having an insulation region over the substrate and a fin extending through an opening in the insulation region;
- forming a gate electrode layer over the fin and extending over the insulation region;
- forming a gate electrode from the gate electrode layer, the gate electrode extending over an upper portion of the fin, the gate electrode having a first base and a first bottom interposed between the first base and the substrate;
- and
- forming a dummy gate electrode from the gate electrode layer, the dummy gate electrode extending over the insulation region, the dummy gate electrode being isolated from other circuitry, the dummy gate electrode having a second base and a second bottom interposed between the second base and the substrate, the second base being wider than the second bottom, the second bottom being narrower than the first bottom.
Dependencies are inferred from the claim text.