Wafer transport apparatus

Abstract

An object is to make it possible to adequately reduce the wafer transport time and to contribute to size-reduction of the semiconductor processing system. Two wafer supports (3, 4) on which wafers (100) are placed are arranged to be apart from each other by a distance (D) in a vertical direction . To transport two wafers (100) to respective loading stages (200A, 200B), first a wafer (100) placed on the lower wafer support (3) is subjected to correction of its position in its main plane, and the wafer supports (3, 4) are descended. After the wafer (100) placed on the wafer support (3) is loaded onto pins (211-213), another wafer (100) placed on the upper wafer support (4) is subjected to correction of its position in its main plane, and the wafer supports (3, 4) are descended.

Dependencies are inferred from the claim text.