Method and apparatus for performing data rate conversion and phase alignment

A gearbox integrated circuit (IC) comprising:

• a first electrical interface having N input terminals for inputting N binary electrical data signals having a data rate of X gigabits per second (Gbps) and N output terminals for outputting N binary electrical data signals having a data rate of X Gbps, wherein N is a positive integer that is equal to or greater than 2 and X is a positive number that is equal to or greater than 25;
• phase-alignment circuitry for phase-aligning pairs of the N inputted binary electrical data signals to produce N/2 pairs of phase-aligned binary electrical data signals;
• pulse amplitude modulation (PAM) encoding circuitry that receives the N/2 phase-aligned pairs of binary electrical data signals, encodes each of the N/2 phase-aligned pairs into a respective serial PAM-encoded electrical data signal having a data rate of X Gbps, and outputs N/2 X Gbps serial PAM-encoded electrical data signals;
• a second electrical interface having N/2 output terminals and N/2 input terminals, wherein the N/2 X Gbps serial PAM-encoded electrical data signals are outputted from the gearbox IC via the respective N/2 output terminals of the second electrical interface;
• and
• PAM decoding circuitry that receives N/2 X Gbps serial PAM-encoded electrical data signals that are inputted to the gearbox IC via the N/2 input terminals, respectively, of the second electrical interface, decodes the inputted N/2 X Gbps serial PAM-encoded electrical data signals into N X Gbps serial binary electrical data signals, and outputs the N X Gbps serial binary electrical data signals from the PAM decoding circuitry, and wherein the N X Gbps serial binary electrical data signals are outputted from the gearbox IC via the N output terminals, respectively, of the first electrical interface.

A method for performing rate conversion and phase alignment in a gearbox integrated circuit (IC), the method comprising:

• in a first electrical interface of the gearbox IC, inputting N electrical data signals having a data rate of X gigabits per second (Gbps) via respective input terminals of a first electrical interface of the gearbox IC, wherein N is a positive integer that is equal to or greater than 2 and X is a positive number that is equal to or greater than 25;
• in phase-alignment circuitry of the gearbox IC, phase-aligning pairs of the N inputted electrical data signals to produce N/2 pairs of phase-aligned electrical data signals;
• in first rate conversion circuitry of the gearbox IC, receiving the N/2 phase-aligned pairs of electrical data signals from the phase-alignment circuitry and converting each of the N/2 phase-aligned pairs into a respective serialized electrical data signal having a data rate of 2X Gbps;
• from a second electrical interface of the gearbox IC, outputting the N/2 serialized 2X Gbps electrical data signals from the gearbox IC via the N/2 respective output terminals of the second electrical interface;
• in second rate conversion circuitry of the gearbox IC, receiving N/2 2X Gbps electrical data signals inputted to the gearbox IC via the N/2 respective input terminals of the second electrical interface and converting the N/2 2X Gbps electrical data signals into N X Gbps electrical data signals having a data rate of X Gbps;
• and
• outputting the N X Gbps electrical data signals from the gearbox IC via the N output terminals, respectively, of the first electrical interface.

A method for performing rate conversion and phase alignment in a gearbox integrated circuit (IC), the method comprising:

• in a first electrical interface of the gearbox IC, inputting N electrical data signals having a data rate of X gigabits per second (Gbps) via respective input terminals of a first electrical interface of the gearbox IC, wherein N is a positive integer that is equal to or greater than 2 and X is a positive number that is equal to or greater than 25;
• in phase-alignment circuitry of the gearbox IC, phase-aligning pairs of the N inputted electrical data signals to produce N/2 pairs of phase-aligned electrical data signals;
• in pulse amplitude modulation (PAM) encoding circuitry of the gearbox IC, receiving the N/2 phase-aligned pairs of binary electrical data signals, encoding each of the N/2 phase-aligned pairs into a respective serial PAM-encoded electrical data signal having a data rate of X Gbps, and outputting N/2 X Gbps serial PAM-encoded electrical data signals from the PAM encoding circuitry;
• in a second electrical interface of the gearbox IC, receiving the N/2 X Gbps serial PAM-encoded electrical data signals from the PAM encoding circuitry and outputting the N/2 X Gbps serial PAM-encoded electrical data signals from the gearbox IC via N/2 respective output terminals of the second electrical interface;
• in PAM decoding circuitry of the gearbox IC, receiving N/2 X Gbps serial PAM-encoded electrical data signals that are inputted to the gearbox IC via N/2 respective input terminals of the second electrical interface, decoding the inputted N/2 X Gbps serial PAM-encoded electrical data signals into N X Gbps serial binary electrical data signals, and outputting the N X Gbps serial binary electrical data signals from the PAM decoding circuitry;
• and
• in the first electrical interface, outputting the N X Gbps serial binary electrical data signals outputted from PAM decoding circuitry via N respective output terminals of the first electrical interface.

An optical communications system for use in an optical fiber link, the optical communications system comprising:

• an application specific integrated circuit (ASIC), the ASIC outputting N electrical data signals having a data rate of X gigabits per second (Gbps) from a first set of output terminals of the ASIC, where N is a positive integer that is equal to or greater than 2 and where X is a positive number that is equal to or greater than 25;
• a gearbox integrated circuit (IC), the gearbox IC inputting, via a first set of input terminals of the gearbox IC, the N X Gbps electrical data signals outputted from the ASIC, and converting the N electrical data signals into N/2 electrical data signals having a data rate of 2X Gbps, the gearbox IC outputting the N/2 2X Gbps electrical data signals from a first set of output terminals of the gearbox IC;
• and
• an optical transceiver module, the optical transceiver module receiving the N/2 2X Gbps electrical data signals output from the first set of output terminals of the first gearbox IC and causing N/2 electrical-to-optical conversion (EOC) elements to produce N/2 2X Gbps optical data signals corresponding to the N/2 2X Gbps electrical data signals received in the optical transceiver module, and wherein an optics system of the optical transceiver module couples the respective N/2 2X Gbps optical data signals into respective ends of respective optical fibers of a plurality of optical fibers connected to the optical transceiver module.

An optical communications system for use in an optical fiber link, the optical communications system comprising:

• an application specific integrated circuit (ASIC), the ASIC outputting N electrical data signals having a data rate of X gigabits per second (Gbps) from a first set of output terminals of the ASIC, where N is a positive integer that is equal to or greater than 2 and where X is a positive number that is equal to or greater than 25;
• a first gearbox integrated circuit (IC), the first gearbox IC inputting, via a first set of input terminals of the gearbox IC, the N X Gbps electrical data signals outputted from the ASIC and converting the N X Gbps electrical data signals into N/2 X Gbps serial pulse amplitude modulated (PAM)-encoded electrical data signals, the first gearbox IC outputting the N/2 X Gbps serial PAM-encoded electrical data signals from a first set of output terminals of the first gearbox IC;
• and
• an optical transceiver module, the optical transceiver module receiving the N/2 X Gbps serial PAM-encoded electrical data signals outputted from the first set of output terminals of the first gearbox IC and causing N/2 electrical-to-optical conversion (EOC) elements to produce N/2 X Gbps PAM-encoded optical data signals corresponding to the N/2 X Gbps serial PAM-encoded electrical data signals received in the optical transceiver module, and wherein the optics system couples the respective N/2 X Gbps PAM-encoded optical data signals into respective ends of respective optical fibers of the plurality of optical fibers.

A method for communicating over an optical fiber link, the method comprising:

• outputting N electrical data signals having a data rate of X gigabits per second (Gbps) from a first set of output terminals of an application specific integrated circuit (ASIC), where N is a positive integer that is equal to or greater than 2 and where X is a positive number that is equal to or greater than 25;
• inputting, via a first set of input terminals of the gearbox integrated circuit (IC), the N X Gbps electrical data signals outputted from the ASIC and converting the NX Gbps electrical data signals into N/2 2X Gbps electrical data signals;
• outputting, via a first set of output terminals of the gearbox IC, the N/2 2X Gbps electrical data signals from the gearbox IC;
• inputting into the optical transceiver module, via a first set of input terminals of an optical transceiver module, the N/2 2X Gbps electrical data signals output from the gearbox IC;
• with N/2 electrical-to-optical conversion (EOC) elements of the optical transceiver module, converting the inputted N/2 2X Gbps electrical data signals into N/2 2X Gbps optical data signals, respectively;
• and
• with an optics system of the optical transceiver module, coupling the respective N/2 2X Gbps optical data signals into respective ends of respective optical fibers of a plurality of optical fibers connected to the optical transceiver module.

A method for communicating over an optical fiber link, the method comprising:

• outputting N electrical data signals having a data rate of X gigabits per second (Gbps) from a first set of output terminals of an application specific integrated circuit (ASIC), where N is a positive integer that is equal to or greater than 2 and where X is a positive number that is equal to or greater than 25;
• inputting, via a first set of input terminals of a gearbox integrated circuit (IC), the N X Gbps electrical data signals outputted from the ASIC and converting the N X Gbps electrical data signals into N/2 pulse amplitude modulated (PAM)-encoded electrical data signals having a data rate of X Gbps;
• outputting, via a first set of output terminals of the gearbox IC, the N/2 X Gbps PAM-encoded electrical data signals from the gearbox IC;
• inputting into an optical transceiver module, via a first set of input terminals of the optical transceiver module, the N/2 X Gbps PAM-encoded electrical data signals output from the gearbox IC;
• with N/2 electrical-to-optical conversion (EOC) elements of the optical transceiver module, converting the inputted N/2 X Gbps PAM-encoded electrical data signals into N/2 X Gbps PAM-encoded optical data signals, respectively;
• and
• with an optics system of the optical transceiver module, coupling the N/2 X Gbps PAM-encoded optical data signals into respective ends of respective optical fibers of a plurality of optical fibers connected to the optical transceiver module.