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US 2014/0320192 A1Published application
Interpolation circuit and receiving circuit
AssigneeFujitsu Limited
InventorsTakayuki HAMADA, Sanroku TSUKAMOTO
Life of this patent
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Abstract
An interpolation circuit includes: a plurality of holding circuits configured to each hold a corresponding input data input chronologically; and a generating circuit configured to generate interpolation data by giving weights, based on an interpolation code, to input data that are chronologically adjacent to each other and are held by the plurality of holding circuits and combining the weighted data together.
Claims16
An interpolation circuit comprising:
- a plurality of holding circuits configured to each hold a corresponding input data input chronologically;
- and
- a generating circuit configured to generate interpolation data by giving weights, based on an interpolation code, to input data that are chronologically adjacent to each other and are held by the plurality of holding circuits and combining the weighted data together.
A receiving circuit comprising:
- an interpolation circuit configured to generate an interpolation data;
- and
- a detection circuit configured to detect a phase of the interpolation data item, and generate an interpolation code,
- wherein the interpolation circuit includes:
- a plurality of holding circuits configured to each hold a corresponding input data input chronologically;
- and
- a generating circuit configured to generate interpolation data by giving weights, based on an interpolation code, to input data that are chronologically adjacent to each other and are held by the plurality of holding circuits and combining the weighted data together.
4 more elements
Dependencies are inferred from the claim text.