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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsiao-Tsung Yen, Chin-Wei Kuo, Chih-Yuan Chang, Min-Chie Jeng
Estimating the term…
Some embodiments relate to a wafer. The wafer includes a first dummy component comprising two or more first dummy component transmission lines. One of the first dummy component transmission lines operably couples a first signal test pad to a second signal test pad, and an other of the first dummy component transmission lines operably couples a third signal test pad to a fourth signal test pad. A second dummy component comprises two or more second dummy component transmission lines. One of the second dummy component transmission lines operably couples a fifth signal test pad to a sixth signal test pad, and an other of the second dummy component transmission lines operably couples a seventh signal test pad to an eighth signal test pad. Other embodiments are also disclosed.
A wafer including at least one die that comprises a plurality of devices and at least one four-port test structure for de-embedding at least one of the devices which is referred to as a device under test (DUT), wherein the four port test structure on the wafer comprises:
A method for de-embedding an on-wafer device comprising:
A test structure for de-embedding an on-wafer device comprising:
Dependencies are inferred from the claim text.