Implantable medical device having clock tree network with reduced power consumption
AssigneeMedtronic, Inc.
InventorsKevin K. Walsh, Melvin P. Roberts
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a clock tree network that distributes a clock signal to a plurality of clocked components of the integrated circuit. The clock tree network includes clock lines, each of which includes a clock tree delay element that provides a modified clock signal that is provided to an individual one the clocked components. Among the plurality of clocked components, one or more of the clocked components provides a data signal to another one or more of the clocked components. The one or more clocked components are configured having a transmission duration for the data signal that is longer relative to a transmission duration of the modified clock signal of the receiving clocked component.
Claims21
An integrated circuit, comprising:
- a clock source for generating a clock signal;
- a clock tree having a plurality of clock lines distributed within the integrated circuit for transmission of the clock signal;
- a plurality of clocked components, wherein each of the clocked components includes a data signal transmission path having a clocked component delay element and being connected to one of the plurality of clock lines;
- a first data signal line coupled between a data output of a transmitting clocked component of the plurality of clocked components and a data input of a receiving clocked component of the plurality of clocked components;
- and
- a clock tree delay element coupled to a clock line of the receiving clocked component to generate a modified clock signal, wherein the transmitting clocked component is configured to output the data subsequent to reception of the modified clock signal by the receiving clocked component.
An implantable medical device having an integrated circuit for controlling a therapy delivery and a sensing function comprising:
- a clock source for generating a clock signal;
- a clock tree having a plurality of clock lines distributed within the integrated circuit for transmission of the clock signal;
- a plurality of clocked components, wherein each of the clocked components includes a data signal transmission path having a clocked component delay element and being connected to one of the plurality of clock lines;
- a first data signal line coupled between a data output of a transmitting clocked component of the plurality of clocked components and a data input of a receiving clocked component of the plurality of clocked components;
- and
- a clock tree delay element coupled to a clock line of the receiving clocked component to generate a modified clock signal, wherein the transmitting clocked component is configured to output the data subsequent to reception of the modified clock signal by the receiving clocked component.
A method of optimizing power consumption in an integrated circuit, comprising:
- transmitting a clock signal through a clock tree having a plurality of clock lines, wherein each of the clock lines is coupled to a plurality of clocked components;
- configuring a first of the plurality of clocked components as a transmitting clocked component coupled to a first of the plurality of clock lines;
- propagating a clock signal to the transmitting clocked component through the first clock line;
- measuring a duration of propagation of the clock signal to the transmitting clocked component;
- propagating the clock signal through a clock tree delay element coupled to a second of the plurality of clock lines to provide a modified clock signal to a first of the plurality of clocked components that is configured as a receiving clocked component;
- measuring a duration of transmission of the modified clock signal to the receiving clocked component;
- generating a data signal at the transmitting clocked component in response to receipt of the clock signal by the receiving clocked component;
- and
- transmitting the data signal from the transmitting clocked component to the receiving clocked component,
- wherein configuring the transmitting clocked component comprises providing a data transmission path within the transmitting clocked component having a clocked component delay element that yields a predetermined propagation duration of the data that results in receipt of the data signal by the receiving clocked component subsequent to receipt of the modified clock signal.
Dependencies are inferred from the claim text.