Patterning method for semiconductor device fabrication
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYen-Chun Huang, Ming-Feng Shieh, Chih-Ming Lai, Ken-Hsien Hsieh
Life of this patent
Estimating the term…
Abstract
A method includes forming a first pattern having a first opening on a semiconductor substrate. The first opening is then filled. A second pattern of a first and second feature, interposed by the filled opening, is formed on the semiconductor substrate. Spacer elements then are formed on sidewalls of the filled opening, the first feature and the second feature. After forming the spacer elements, the material comprising first and second features is removed to form a second opening and a third opening. The filled opening, the second opening and the third opening are used as a masking element to etch a target layer of the substrate.
Claims20
A method, comprising:
- forming a first pattern on a semiconductor substrate having a target layer, wherein the first pattern includes a first opening;
- filling the first opening with a fill material, thereby forming a filled opening;
- forming a second pattern on the semiconductor substrate, wherein the second pattern includes a first feature and a second feature, the filled opening interposing the first and second features;
- forming a spacer elements on sidewalls of the filled opening, the first feature, and the second feature;
- after forming the spacer elements, removing material comprising first and second features to form a second opening and a third opening, wherein sidewalls of the second and third openings are defined by the spacer elements;
- and
- using the filled opening, the second opening and the third opening as a masking element to etch the target layer.
A method of semiconductor fabrication, comprising:
- forming a first photoresist element on a substrate, wherein the first photoresist element has an opening therein;
- filling the opening to form a filled opening;
- removing the first photoresist element after filling the opening;
- after filling the opening, forming a second photoresist element and a third photoresist element adjacent to and coplanar with the filled opening;
- forming a spacer element on sidewalls of the second photoresist element and the third photoresist element;
- after forming the spacer elements, removing the second and third photoresist elements;
- and
- using the filled opening and the spacer elements as a masking element to provide an interconnect layer of a semiconductor device.
A method, comprising:
- forming a first feature on a layer of a substrate using a first patterning process;
- after forming the first feature, forming a second feature and a third feature on the layer of the substrate using a second patterning process, wherein the first feature interposes the second and third features and wherein a space surrounds the first feature;
- forming a conformal layer over the first, second, and third features;
- etching back the conformal layer to expose a top surface of the first, second and third features;
- removing the second and third features after exposing the top surface to form a first and second opening;
- using the space, the first opening and the second opening to form trenches in an underlying layer;
- and
- using the trenches to pattern an interconnect structure of a semiconductor device.
Dependencies are inferred from the claim text.