Method of Patterning a Feature of a Semiconductor Device

A method, comprising:

• forming a first pattern over a semiconductor substrate, wherein the first pattern includes a first feature and a second feature;
• forming a masking layer over the first and second features;
• forming an opening in the masking layer, wherein the opening extends over at least one of the first and second features;
• using the opening to form a third feature between the first and second features;
• after forming the third feature, forming a second pattern over the semiconductor substrate, wherein the second pattern includes a fourth feature and a fifth feature each having an edge defined by the third feature;
• and
• using the first, second, fourth and fifth features to pattern an underlying layer over the semiconductor substrate.

A method, comprising:

• forming a first feature and a second feature, wherein each of the first and second features has spacer elements abutting the sidewalls;
• forming a first photoresist layer over the first and second features and spacer elements;
• forming an opening in the first photoresist layer, wherein the opening extends over at least one of the spacer elements;
• using the opening to form a trench in a second photoresist layer between the first and second features having spacer elements, wherein the trench has a first end having a physical interface with the spacer element of the first feature and a second opposing end having a physical interface with the spacer element of the second feature;
• after forming the trench, concurrently forming a third feature and a fourth feature, wherein the trench has a first side having a physical interface with the third feature and a second, opposing side having a physical interface with the fourth feature;
• and
• using the first, second, third and fourth features to pattern an interconnect structure of a semiconductor device.