Spacer Etching Process For Integrated Circuit Design

A method of forming a target pattern on a substrate, the method comprising:

• forming a first material layer on the substrate;
• performing a first patterning process using a first layout to form a first plurality of trenches in the first material layer;
• performing a second patterning process using a second layout to form a second plurality of trenches in the first material layer;
• forming spacer features on sidewalls of both the first plurality of trenches and the second plurality of trenches, the spacer features having a thickness;
• removing the first material layer;
• forming a second material layer on the substrate and within openings defined by the spacer features;
• and
• removing the spacer features;
• wherein the target pattern is formed with the first layout and the second layout.

A method of forming a target pattern, the method comprising:

• depositing a first material layer on a substrate;
• performing a first lithography patterning process using a first layout to form a first plurality of trenches in the first material layer;
• performing a second lithography patterning process using a second layout to form a second plurality of trenches in the first material layer;
• forming spacer features on sidewalls of both the first plurality of trenches and the second plurality of trenches using a process including deposition and etching, the spacer features having a thickness;
• removing the first material layer by an etching process;
• etching the substrate using the spacer features as an etch mask;
• and
• thereafter removing the spacer features using one of:
• an etching process and a polishing process;
• wherein:
• the target pattern is formed with the first layout and the second layout;
• the first layout includes a first subset of the target pattern;
• the second layout includes a second subset of the target pattern and a cut pattern for the first subset;
• and
• the cut pattern corresponds to a portion of the second layout wherein width of the second layout is less than twice the thickness of the spacer features.