Methods of forming a semiconductor device with a nanowire channel structure by performing an anneal process

A method of forming a device, comprising:

• forming a layer of silicon/germanium on a semiconductor substrate, said layer of silicon/germanium having a germanium concentration of at least 30%;
• forming a plurality of spaced-apart trenches that extend through said layer of silicon/germanium and at least partially into said semiconducting substrate, said trenches defining a fin structure for said device comprised of a portion of said substrate and a portion of said layer of silicon/germanium, said portion of said layer of silicon/germanium having a first cross-sectional configuration;
• forming a layer of insulating material comprised of silicon dioxide in said trenches and above said fin structure, wherein, after formation, said layer of insulating material comprises silanol (SiOH);
• performing an anneal process on said device in a non-oxidizing process ambient so as to cause said first cross-sectional configuration of said portion of said layer of silicon/germanium to change to a second cross-sectional configuration that is different from said first cross-sectional configuration;
• and
• forming a final gate structure around at least a portion of said portion of said layer of silicon/germanium having said second cross-sectional configuration.

A method of forming a device, comprising:

• forming a layer of silicon/germanium on a semiconductor substrate, said layer of silicon/germanium having a germanium concentration of at least 50%;
• forming a plurality of spaced-apart trenches that extend through said layer of silicon/germanium and at least partially into said semiconducting substrate, said trenches defining a fin structure for said device comprised of a portion of said substrate and a portion of said layer of silicon/germanium, said portion of said layer of silicon/germanium having a first cross-sectional configuration;
• forming a layer of insulating material comprised of silicon dioxide in said trenches and above said fin structure, wherein, after formation, said layer of insulating material comprises silanol (SiOH);
• performing a rapid thermal anneal process on said device in a non-oxidizing process ambient so as to cause said first cross-sectional configuration of said portion of said layer of silicon/germanium to change to a second cross-sectional configuration that is different from said first cross-sectional configuration, said rapid thermal anneal process being performed with a temperature rate increase that falls within the range of about 50-100° C./sec for at least a portion of said rapid thermal anneal process;
• and
• forming a final gate structure around at least a portion of said portion of said layer of silicon/germanium having said second cross-sectional configuration.