High Productivity Combinatorial Screening for Stable Metal Oxide TFTs
AssigneeIntermolecular, Inc.
InventorsJeroen Van Duren, Sang Lee, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntermolecular, Inc.
InventorsJeroen Van Duren, Sang Lee, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
Estimating the term…
Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate electrode deposition, gate electrode patterning, gate dielectric deposition, gate dielectric patterning, metal-based semiconductor material (e.g. IGZO) deposition, metal-based semiconductor material (e.g. IGZO) patterning, etch stop deposition, etch stop patterning, source/drain deposition, source/drain patterning, passivation deposition, or passivation patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.
A method for forming a plurality of thin film transistors on a substrate in a combinatorial manner, the method comprising:
A method for forming a plurality of thin film transistors on a substrate in a combinatorial manner, the method comprising:
Dependencies are inferred from the claim text.