Methods for fabricating integrated circuits including multi-patterning of masks for extreme ultraviolet lithography

A method for fabricating an integrated circuit comprising:

• mounting a mask blank on a first chuck and patterning a first photoresist layer overlying the mask blank to form a first patterned photoresist layer;
• forming fiducials into the mask blank using the first patterned photoresist layer to define a first patterned mask;
• mounting the first patterned mask on a second chuck and determining a non-flatness compensation for the first patterned mask mounted on the first chuck relative to being mounted on the second chuck using the fiducials;
• adjusting a device pattern using the non-flatness compensation;
• mounting the first patterned mask on the first chuck and patterning a second photoresist layer overlying the first patterned mask with the device pattern to form a second patterned photoresist layer;
• transferring the device pattern to the first patterned mask using the second patterned photoresist layer to form a second patterned mask.

A method for fabricating an integrated circuit comprising:

• patterning a first photoresist layer overlying a mask blank that is mounted on a first chuck to form a first patterned photoresist layer;
• forming fiducials into the mask blank using the first patterned photoresist layer to define a first patterned mask;
• mounting the first patterned mask on a second chuck and determining a non-flatness compensation for the first patterned mask mounted on the first chuck relative to being mounted on the second chuck using the fiducials;
• mounting the first patterned mask on the first chuck and patterning a second photoresist layer overlying the first patterned mask to form a second patterned photoresist layer including a device pattern that has been adjusted using the non-flatness compensation;
• transferring the device pattern to the first patterned mask using the second patterned photoresist layer to form a second patterned mask;
• depositing a third photoresist layer overlying a semiconductor wafer;
• patterning the third photoresist layer using the second patterned mask that is mounted on the second chuck to form a third patterned photoresist layer;
• and
• selectively etching the semiconductor wafer using the third patterned photoresist layer to form a patterned semiconductor wafer that includes the device pattern.