Method and system for improving data integrity in non-volatile storage
AssigneeSanDisk Enterprise IP LLC
InventorsJames Fitzpatrick, Amirhossein Rafati
Life of this patent
Estimating the term…
Abstract
A method for improving data integrity in a non-volatile memory system includes: accessing a non-volatile memory cell for retrieving hard data bits; generating soft information by capturing a reliability of the hard data bits; calculating syndrome bits by applying a lossy compression to the soft information; and generating a host data by executing a low density parity check (LDPC) iterative decode on the hard data bits and the syndrome bits.
Claims20
A method for improving data integrity in a non-volatile memory system comprising:
- accessing a non-volatile memory cell for retrieving hard data bits;
- generating soft information by capturing a reliability of the hard data bits;
- calculating syndrome bits by applying a lossy compression to the soft information;
- and
- generating a host data by executing a low density parity check (LDPC) iterative decode on the hard data bits and the syndrome bits.
A non-volatile memory system comprising:
- a non-volatile memory cell, coupled to a destination register, for retrieving hard data bits;
- a soft information module, coupled to the destination register, for capturing a reliability of the hard data bits;
- a lossy compression module, coupled to the soft information module, for calculating syndrome bits;
- and
- an error correction module, coupled to the lossy compression module, for generating a host data by executing a low density parity check (LDPC) iterative decode on the hard data bits and the syndrome bits.
A non-volatile memory system comprising:
- a non-volatile memory device includes:
- a non-volatile memory cell having hard data bits,
- a destination register, coupled to the non-volatile memory cell, for retrieving the hard data bits,
- a soft information module, coupled to the destination register, for capturing a reliability of the hard data bits,
- a lossy compression module, coupled to the soft information module, for calculating syndrome bits;
- and
- a controller module, coupled to the non-volatile memory device, includes:
- an error correction module for generating a host data by executing a low density parity check (LDPC) iterative decode on the hard data bits and the syndrome bits.
Dependencies are inferred from the claim text.