Apparatuses and methods for compressing data received over multiple memory accesses

An apparatus, comprising:

• an array of memory cells, wherein the array is divided into a plurality of groups of memory cells, a group of memory cells of the plurality of groups of memory cells being associated with a respective channel of a plurality of channels, the respective channel of the plurality of channels configured to provide data from the group of memory cells of the plurality of groups of memory cells responsive to a memory access;
• and
• a compression block coupled to the array of the plurality of memory cells, the compression block comprising a plurality of compression circuits, a compression circuit of the plurality of compression circuits coupled to the respective channel of the plurality of channels, wherein the compression circuit of the plurality of compression circuits is configured to compare data provided by the respective group of memory cells of the plurality of groups of memory cells responsive to a plurality of memory accesses and, responsive to the comparison of the data indicating an error, to set an error bit to an error detected state and to latch the error bit having the error detected state.