Method for controlling information processing apparatus and information processing apparatus
AssigneeFujitsu Limited
InventorTakeo MURAKAMI
Life of this patent
Estimating the term…
Abstract
A method of controlling an apparatus including a processor including a plurality of cores, the method includes, when a number of the cores to be activated is M, determining whether or not a first power consumed by the M activated core is within a range of a second power to be consumed when the number of the cores to be activated is M+N, and when the first power is out of the range of the second power, prohibiting to increase the number of the cores to be activated from M to M+N.
Claims20
A method of controlling an apparatus including a processor including a plurality of cores, the method comprising:
- when a number of the cores to be activated is M, determining whether or not a first power consumed by the M activated core is within a range of a second power to be consumed when the number of the cores to be activated is M+N;
- and
- when the first power is out of the range of the second power, prohibiting to increase the number of the cores to be activated from M to M+N.
An apparatus comprising:
- a memory;
- and
- a processor including a plurality of cores and coupled to the memory and configured to:
- when a number of the cores to be activated is M, determine whether or not a first power consumed by the M activated core is within a range of a second power to be consumed when the number of the cores to be activated is M+N, and
- when the first power is out of the range of the second power, prohibit to increase the number of the cores to be activated from M to M+N.
A non-transitory computer-readable storage medium storing a program for causing a computer to execute a method, the method comprising:
- when a number of the cores to be activated is M, determining whether or not a first power consumed by the M activated core is within a range of a second power to be consumed when the number of the cores to be activated is M+N;
- and
- when the first power is out of the range of the second power, prohibiting to increase the number of the cores to be activated from M to M+N.
Dependencies are inferred from the claim text.