Power control for data processor
AssigneeAdvanced Micro Devices, Inc.
InventorGreg Sadowski
Life of this patent
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Abstract
A data processor includes a data processor core, and a power controller. The data processor core is adapted to control an external memory system and to perform a task by accessing the external memory system, where the task has an associated computation rate, and the data processor is adapted to control the external memory system by powering up the external memory system when needed. The power controller is coupled to the data processor core for controlling a power consumption of the data processor core and the external memory system by issuing control signals to change an activation time and an activation frequency of the data processor core and the memory system.
Claims28
A data processing system comprising:
- a data processor core adapted to control an external memory system and to perform a task by accessing said external memory system, wherein said task has an associated computation rate, and said data processor is adapted to control said external memory system by powering up said external memory system when needed;
- and
- a power controller coupled to said data processor core for controlling a power consumption of said data processor core and said external memory system by issuing control signals to change an activation time and an activation frequency of said data processor core and said memory system.
A data processing system comprising:
- a data processor core adapted to control to an external memory system and to perform a task by accessing said external memory system, wherein said task has an associated computation rate, and said data processor is adapted to control said external memory system by powering up said external memory system when needed;
- and
- a power controller coupled to said data processor core for controlling a power consumption of said data processor core based on dynamic power consumption, leakage power, and estimated power consumption of said external memory system.
A power controller for a data processing system comprising:
- a leakage calculator having a first input for receiving a temperature signal, a second input for receiving an operating frequency value, a third input for receiving an operating voltage value, and an output for providing a leakage power signal;
- a power calculator and controller circuit having a first input for receiving said operating frequency value, a second input for receiving said operating voltage value, and an output;
- and
- a control signal generator having an input coupled to said output of said power calculator and controller circuit, a first output for providing said operating frequency value, a second output for providing said operating voltage value, a third output for providing a clock signal at a frequency corresponding to said operating frequency value, and a fourth output for providing a voltage corresponding to said operating voltage value.
A method comprising:
- issuing commands to power up an external memory system when needed by a data processor core;
- issuing accesses to said external memory system;
- performing a task having an associated computation rate and associated accesses to said external memory system;
- and
- issuing control signals to change an activation time and an activation frequency of said data processor core and said external memory system in response to said associated computation rate and said associated accesses.
Dependencies are inferred from the claim text.