Dynamically Controlling A Maximum Operating Voltage For A Processor
AssigneeIntel Corporation
InventorsZhiguo Wang, David J. Ayers, Srikanth Balasubramanian, Sukirti Gupta, Stefan Rusu, Stephen M. Ramey
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Abstract
In an embodiment, a processor includes voltage calculation logic to calculate a plurality of maximum operating voltage values each associated with a number of active cores of the plurality of cores, based at least in part on a plurality of coefficient values. In this way, the processor can operate at different maximum operating voltages dependent on the number of active cores. Other embodiments are described and claimed.
Claims20
A processor comprising:
- a core domain including a plurality of cores each to execute instructions;
- a non-volatile storage to store a plurality of coefficient values;
- and
- voltage calculation logic to calculate a plurality of maximum operating voltage values each associated with a number of active cores of the plurality of cores, based at least in part on the plurality of coefficient values.
A machine-readable medium having stored thereon instructions, which if performed by a machine cause the machine to perform a method comprising:
- determining a maximum operating voltage for a processor based on a number of active cores of the processor, responsive to a change in the number of active cores;
- and
- computing a resolved operating voltage for the processor based on the maximum operating voltage and at least one constraint of the processor.
A system comprising:
- a multicore processor including a plurality of cores, a storage to store a plurality of maximum operating voltage values, each of the plurality of maximum operating voltage values a function of a number of active cores, and a voltage control logic to dynamically control an operating voltage to be a corresponding one of the maximum operating voltage values or a clip voltage value, the clip voltage value based on at least one of a plurality of processor constraints;
- and
- a dynamic random access memory (DRAM) coupled to the multicore processor.
Dependencies are inferred from the claim text.